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How to identify chip packages

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A chip package is what surrounds the integrated circuit die and connects the die's pads to the packages external pins. They are often a chip carriers, or IC packages.

Types of Leads/ContactsEdit

The pieces of metal that electrically connect the IC to a circuit board are called leads.

Ic leads-j-lead


Ic leads-gull wing


Ic leads-c lead


Ic leads-i lead


Ic leads-batwing


Ic leads-through-hole

DIP Through-Hole

Ic leads-exposed pad

Exposed Pad

Ic leads-solder ball

Ball (solder ball)

Ic leads-Heat-tab

Tab (Heatsink)

Ic leads-pad

Land pad (Non-leaded/No-lead)

PGA Pin Column

Common PackagesEdit

  • CPGA: Ceramic pin grid array
  • PDIP: Plastic dual in-line package
  • BGA : Ball grid array
  • SO: Small outline
    • SOIC: Small outline integrated circuit
    • SOT: Small outline transistor
    • SOJ: Small outline J-lead
  • PQFP: Plastic quad flat package
  • PLCC: plastic leaded chip carrier
  • TO: transistor outline

Chip packagesEdit

See all chip package images: Category:Chip package image

Chip Carrier Related AcronymsEdit

  • COL: Chip-on-Lead
  • TEP: Top Exposed Pad
  • EP, EXP: Exposed pad
  • L, LD: Lead
  • SiP: System in Package
  • JEDEC: Joint Electron Device Engineering Council
  • JEITA: Japan Electronics and Information Technology Industries Association
  • SoC: System on Chip
  • ASIC: Application specific Integrated circuit
  • Pb: lead
  • Sn: tin
  • Cu: Copper
  • Au: Gold
  • EIA: Electronic Industries Alliance
  • MCP: Multi-Chip Package
  • EIAJ: Electronic Industries Association of Japan
  • TAB: Tape Automated Bonding

See AlsoEdit

External LinksEdit

New linksEdit


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