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add a new chip package as a different name. Try to be descriptive. Example TSOP-16L.gif then add it to the page
Appears on these pages
Diodes SOD: Small outline diode DO: Diode Outline LLDS Contents 1 Diodes 1.1 SOD: Small outline...
CSP: Laminated Wafer level CSP, WL: Wafer level  Collumn grid array (CGA)
FLATPACK CERPACK QFI SOI Contents 1 FLATPACK 2 CERPACK 3 QFI 4 SOI Image Abbrv Full Name JEDEC...
Click on a date/time to view the file as it appeared at that time.
|current||02:54, June 23, 2007||288 × 298 (2 KB)||ZyMOS|
|02:49, June 23, 2007||350 × 362 (2 KB)||ZyMOS||add a new chip package as a different name. Try to be descriptive. Example TSOP-16L.gif then add it to the page|